Monday, June 27, 2011
Wednesday, June 22, 2011
LED Substrate Surprises
Last week at the Taiwan Photonics Festival, Samsung made the announcement they have successfully produced HB-LEDs on 8” sapphire wafers. As most industry leaders are moving to 6”, this step could signal a disruptive era in cost reduction with widespread implications. A move to 8” further distances those still at 2”, 3” and 4” from the price leaders and makes the vast supply of used 8’ equipment (PECVD, steppers, etch, cleaning) for silicon more-readily available for LED fabs.
The announcement may be related to Monocrystal’s cryptic announcement in February that they have supplied 8-inch-diameter, c-plane, epi-ready sapphire substrate to an unnamed LED maker. Monocrystal, the Stavropol, Russia-based sapphire wafer supplier, has been supplying 8-inch sapphire substrates for R&D on RFIC application for two years, but the LED interest in 8” was a bit of shocker.
In January, Rubicon Technology announced 12-inch sapphire substrates were now available at various diameters up to 12 inches, specifically mentioning LED, but without a customer acknowledged. The company describes it as “the largest high-quality sapphire wafer ready for production of LEDs.”
With 6” still in roll-out with assumed yield challenges, I’m not sure anyone was taking 12” seriously in January. But the more believable 8” step is just the sort of killer move that Samsung could be expected to make in LEDs.
Meanwhile, Lattice Power Corp. announced that together with ShineOn Inc., they have demonstrated the world's first high-brightness LED product based on GaN-on-Si technology. Aimed at general lighting applications, Lattice claims the product is suitable for indoor lighting, incandescent replacement bulb, flashlight and even direct-lit LCD backlighting applications. Both Philips and Bridgelux have announced R&D developments for GaN on Si, but not commercial product.
Substrate innovation and size advancements will be a critical competitive factor in LEDs for several years. These and other announcements promise a lot of smoke and fire for the foreseeable future.
The announcement may be related to Monocrystal’s cryptic announcement in February that they have supplied 8-inch-diameter, c-plane, epi-ready sapphire substrate to an unnamed LED maker. Monocrystal, the Stavropol, Russia-based sapphire wafer supplier, has been supplying 8-inch sapphire substrates for R&D on RFIC application for two years, but the LED interest in 8” was a bit of shocker.
In January, Rubicon Technology announced 12-inch sapphire substrates were now available at various diameters up to 12 inches, specifically mentioning LED, but without a customer acknowledged. The company describes it as “the largest high-quality sapphire wafer ready for production of LEDs.”
With 6” still in roll-out with assumed yield challenges, I’m not sure anyone was taking 12” seriously in January. But the more believable 8” step is just the sort of killer move that Samsung could be expected to make in LEDs.
Meanwhile, Lattice Power Corp. announced that together with ShineOn Inc., they have demonstrated the world's first high-brightness LED product based on GaN-on-Si technology. Aimed at general lighting applications, Lattice claims the product is suitable for indoor lighting, incandescent replacement bulb, flashlight and even direct-lit LCD backlighting applications. Both Philips and Bridgelux have announced R&D developments for GaN on Si, but not commercial product.
Substrate innovation and size advancements will be a critical competitive factor in LEDs for several years. These and other announcements promise a lot of smoke and fire for the foreseeable future.
Monday, June 06, 2011
Solid State Lighting Systems
Interesting video on the application of SSL networks using LED-based lighting.
Thursday, May 26, 2011
Crisis Management in the Semiconductor Industry
About 20 years ago, while I worked for Motorola, the company began a major initiative to develop and implement effective crisis management plans in support of all its operations worldwide. Several of our fabs and factories had various levels of crisis management planning and processes in place, but there was no standard process in place, and in fact, many major operations had no plans in place at all. Like most large companies, Motorola had experienced a range of crises in their operations around the world, ranging from workplace shootings, fires and explosions, and media alarms about product safety or executive behavior. I remember going to a two-day meeting in Las Vegas where facility managers, division heads, PR and community relations folks from multiple business units got together to discuss and formalize a standard process for crisis preparation and planning.
It was a big deal; a major corporate initiative.
Those memories came back a few weeks ago upon hearing Keenan Evans, ON Semiconductor’s Sr. Vice President Quality, Reliability and EHS, discuss the company’s Crisis Prevention and Management Plan, at the ConFab in Las Vegas. ON, formerly Motorola’s semiconductor operations, demonstrated how advanced crisis management planning can help save lives and respond effectively after the devastating Japan earthquake and its after-effects. While it was 20 years ago, I still had the sense that the initial meeting in Las Vegas was the beginning of a process that culminated in a swift and successful response to a nightmare disaster.
Evans provided a great overview of the planning principals and execution details that were effective in minimizing the earthquake’s impact and quickly getting operations up to full production status. He told an interesting story about how good crisis management plans need more than binders, procedures and protocols, but a commitment to regular exercises and drills. It requires the kind of thankless planning and preparation that many people don’t want to do, that don’t get anyone promoted, that you hope you never to execute. Buts it’s the kind nitty gritty work that large, complex organizations have to exist in our complex world.
Evans described a three-tiered response to the earthquake/tsunami. First, an Emergency Response Team was immediately activated to address personal safety through building evacuations and critical risk assessments. Then, the Crisis Management Team worked to accurately assess the impact of the emergency. Finally, Business Continuity Planning actions were put into place to address short-term needs and begin to meet longer term needs.
Within the first hour all global operations were notified of the events through established messaging and Sharepoint alerts. In the next 10 hours, confirmations that all ON fab personnel were safe, as were all ON personnel traveling in Japan. Initial customer inquiries were received in these first hours and status messages were sent to all employees, and posted on the company website.
Between 10-24 hours after the event, the ON Business Continuity Team convened and began to execute pre-established actions plans addressing global supply chains, planning, logistics, security, HR, EHS, facilities, customer service, and insurance. Within the first 24-hours, the BCT began assessment of local infrastructure stability, impact on materials and chemical suppliers, and alternate sourcing opportunities identified. While only one of ON’s facility sustained major damage, power outages and radiation leaks began to be growing concerns.
Despite rolling blackouts, in one week three of ON’s five sites returned to production. The major immediate issue for ON was the availability of bulk chemicals needed for water and waste water treatment. With damaged roads and mass transit, logistics were impaired and several key suppliers had sustained production stoppages. ON dispatched a Global Sourcing Team to identify and qualify additional suppliers in areas considered at risk. To plan for ongoing power outages, rental generators and co-generators were pursued.
While ON was rapidly restoring their production lines, ongoing news coverage of the nuclear event, electric power shortages and radiation leaks initiated widespread customer inquiries and demands for delivery guarantees, special labeling assuring radiation-free parts, and other requirements flooded ON operations. Many of the demands would impossible to meet even under less-pressing time constraints, but diligent communications and customer service were able to restore customer confidence and order schedules.
By week two, chemical supply issues were solved and alternative sourcing of key supplies were put in place. Power stability was addressed with the purchase of several power generators and the implementation of a co-generation system began. Local transportation and logistics began to normalize and radiation levels were confirmed at normal levels at all ON sites.
As April came, all of ON’s sites returned to production and the power situation further stabilized. Customers received daily delivery schedules and even insurance carriers visited ON sites to begin the financial processes. By end of month, the new generator sets were dispatched on site (see photo at right) and the co-generation system was connected. In addition, alternate supplies of specialty substrate materials were secured and alternative BGA substrate sources were in qualification.
The company announced on May 4, “Of ON Semiconductor’s six manufacturing facilities in Japan, five came back to full production capacity and the sixth factory is ramping towards full production.”
In summary, Evans confirmed that ON Semiconductor’s P2R2 approach worked successfully. ON’s inter-site and global production network contributed to restoring production capacities and solid relations with a global supplier base helped assure a rapid recovery. Many of these tactics are in place at other fabs and key suppliers, confirming the ability of the Japan industry to respond effectively to an extreme and unprecedented event.
It was a big deal; a major corporate initiative.
Those memories came back a few weeks ago upon hearing Keenan Evans, ON Semiconductor’s Sr. Vice President Quality, Reliability and EHS, discuss the company’s Crisis Prevention and Management Plan, at the ConFab in Las Vegas. ON, formerly Motorola’s semiconductor operations, demonstrated how advanced crisis management planning can help save lives and respond effectively after the devastating Japan earthquake and its after-effects. While it was 20 years ago, I still had the sense that the initial meeting in Las Vegas was the beginning of a process that culminated in a swift and successful response to a nightmare disaster.
Evans provided a great overview of the planning principals and execution details that were effective in minimizing the earthquake’s impact and quickly getting operations up to full production status. He told an interesting story about how good crisis management plans need more than binders, procedures and protocols, but a commitment to regular exercises and drills. It requires the kind of thankless planning and preparation that many people don’t want to do, that don’t get anyone promoted, that you hope you never to execute. Buts it’s the kind nitty gritty work that large, complex organizations have to exist in our complex world.
Evans described a three-tiered response to the earthquake/tsunami. First, an Emergency Response Team was immediately activated to address personal safety through building evacuations and critical risk assessments. Then, the Crisis Management Team worked to accurately assess the impact of the emergency. Finally, Business Continuity Planning actions were put into place to address short-term needs and begin to meet longer term needs.
Within the first hour all global operations were notified of the events through established messaging and Sharepoint alerts. In the next 10 hours, confirmations that all ON fab personnel were safe, as were all ON personnel traveling in Japan. Initial customer inquiries were received in these first hours and status messages were sent to all employees, and posted on the company website.
Between 10-24 hours after the event, the ON Business Continuity Team convened and began to execute pre-established actions plans addressing global supply chains, planning, logistics, security, HR, EHS, facilities, customer service, and insurance. Within the first 24-hours, the BCT began assessment of local infrastructure stability, impact on materials and chemical suppliers, and alternate sourcing opportunities identified. While only one of ON’s facility sustained major damage, power outages and radiation leaks began to be growing concerns.
Despite rolling blackouts, in one week three of ON’s five sites returned to production. The major immediate issue for ON was the availability of bulk chemicals needed for water and waste water treatment. With damaged roads and mass transit, logistics were impaired and several key suppliers had sustained production stoppages. ON dispatched a Global Sourcing Team to identify and qualify additional suppliers in areas considered at risk. To plan for ongoing power outages, rental generators and co-generators were pursued.
While ON was rapidly restoring their production lines, ongoing news coverage of the nuclear event, electric power shortages and radiation leaks initiated widespread customer inquiries and demands for delivery guarantees, special labeling assuring radiation-free parts, and other requirements flooded ON operations. Many of the demands would impossible to meet even under less-pressing time constraints, but diligent communications and customer service were able to restore customer confidence and order schedules.
By week two, chemical supply issues were solved and alternative sourcing of key supplies were put in place. Power stability was addressed with the purchase of several power generators and the implementation of a co-generation system began. Local transportation and logistics began to normalize and radiation levels were confirmed at normal levels at all ON sites.
As April came, all of ON’s sites returned to production and the power situation further stabilized. Customers received daily delivery schedules and even insurance carriers visited ON sites to begin the financial processes. By end of month, the new generator sets were dispatched on site (see photo at right) and the co-generation system was connected. In addition, alternate supplies of specialty substrate materials were secured and alternative BGA substrate sources were in qualification.
The company announced on May 4, “Of ON Semiconductor’s six manufacturing facilities in Japan, five came back to full production capacity and the sixth factory is ramping towards full production.”
In summary, Evans confirmed that ON Semiconductor’s P2R2 approach worked successfully. ON’s inter-site and global production network contributed to restoring production capacities and solid relations with a global supplier base helped assure a rapid recovery. Many of these tactics are in place at other fabs and key suppliers, confirming the ability of the Japan industry to respond effectively to an extreme and unprecedented event.
Wednesday, May 25, 2011
Friday, April 08, 2011
Monday, April 04, 2011
Thursday, March 24, 2011
Tuesday, March 22, 2011
Semiconductor Industry Earthquake Status
Like all organizations in the semiconductor industry, SEMI has been impacted by the devastating earthquake in Japan. While our people are safe, they are having difficulties with the transportation infrastructure in Japan and coping with many personal hardships and, in some cases, loss of friends and/or family. The Sendai region was home to many important SEMI member company facilities. Our Japan Board members were also unable to attend our recent Board of Directors meeting in China, focusing on the many personal and business challenges this extreme event has produced. Many of our Japan staff are working with members "on the ground" to assist with disaster recovery, including exploring logistics and shipping alternatives and consulting.
An important consideration for SEMI has been how to serve our members with communications and information. We have explored a number of options and have chosen to focus on aggregating public announcements on earthquake impact status from SEMI members in Japan and in other important SEMI members. You can see a sample of this effort currently posted on the SEMI home page here.
There has been significant, and in some cases hasty, speculation on the impacts to NAND memory, silicon wafer shipments, packaging material resins, capital equipment, and other areas. The news media is doing as good a job as they can in identifying and evaluating these issues for their readers. Before any accurate industry assessment can be made, however, aftershocks need to decline in frequency and severity and the electrical power service needs to be restored. SEMI does not feel it productive to add to the speculation by facilitating, contributing or accelerating what may be poor information. Our friends and colleagues in Japan need to do their work first before a full assessment of the demand and supply issues can be fully examined.
I hope you agree with our approach to aggregate authorized information directly from SEMI members, rather than contribute to an incomplete and premature discussion of the earthquake's impact. There will be time for that soon enough.
If you have any advice or comments on how you or SEMI can contribute to the earthquake relief and industry response effort, please drop me note.
Corning's Beautiful Vision
Great video on the possibilities in flexible electronics, 3D displays, and other emerging and current technologies.
Monday, January 31, 2011
Transistors in Transition
As the semiconductor industry prepares for the 15/14 nm node and beyond, the most revolutionary change in chip architecture is likely to take place. I have been fortunate to hear of many of these possible developments at recent SEMI events, such as SEMICON Korea (Dr. Yoshio Nishi, Stanford), ISS (Paulo Gargini, Intel) and SMC (Nobu Koshiba, President, JSR).
Two main alternatives now being considered by the leading-edge logic makers: vertical devices (FinFETs), and fully depleted planar transistors based on extremely thin SOI (FD-ETSOI) substrates. Further out, researchers are moving from silicon channels to germanium and III-V materials in heterogeneous ICs. Vertical transistors offer the potential for high performance, while presenting several manufacturing challenges. The transistors based on thin SOI substrates also have advantages and challenges. Can wafers with these thin layers be provided with consistent material thicknesses, at acceptable wafer costs?
Industry researchers are also discussing alternatives to today’s charge-based memories, including resistive RAMs (RRAMs), spin-torque transfer RAMs (STT-RAMs), and phase-change memories (PC-RAMs). Memory companies are confident they can advance NAND flash chips by putting memory cells on top of each other. These cell array transistor (CAT) memories could link 16-32 memory cells, taking NAND well beyond the 20 nm generation.
Nobu Koshiba, President, JSR Corporation, said during the keynote of the Strategic Materials Conference, “We are leaving the Materials Era and entering the Architecture Era…the evolution of CMOS devices will be driven by new architectures.”
Characterizing the new era will be diversified pathways to extend scaling, including 3D IC, extended CMOS through FinFET and other innovative structures, beyond-CMOS technologies such as nanotubes, graphene and other non-silicon possibilities, and new application or “fusion devices.” The pathway for logic may include FinFET structures with gate last integration. Challenges to overcome include metal fill through small structure, strained gate, and high temperature resistant dielectric fills that will require new deposition and material approaches.
In addition to 3D, DRAM and NAND pathways may include MRAM and ReRAM that will require new conduction path formation, resistivity change approaches, and the discovery of resistive film materials which enable high performance memory with simple planer stacking and/or cross point structure. New device structures may require magnetic materials with high thermal stability, low temperature (< 250°C) cure dielectrics, and low temperature (< 250°C) deposition of metal through PVD, electro plating, and/or electroless.
At ISS, Paulo Gargini discussed recent research that demonstrated how Ge can achieve high mobility and high drive current, and how Ge -well field effect transistor would be viable p channel option for low power III V CMOS architecture. Carbon nanotubes, graphene ribbons and other graphene approaches are also getting attention at Intel.
I am not a PhD so I can’t fully appreciate all the issues involved in vertical transistors, III V materials or new memory technologies. I think I do appreciate, however, the implications for the supply chain. Traditional scaling has impacted equipment, subsystems and components on a narrow range of parameters. While it drove an equipment and systems upgrade business coincident with Moore’s Law, many of the changes centered around lithography and structure dimensions. These new architecture changes will affect materials, temperatures and process characteristics in every way possible. The R&D challenges are going to be enormous and the collaboration requirements in the industry are going to skyrocket. Big research breakthroughs are going to trickle down to new equipment specifications, new instrumentation, even new vacuum pumps, and more. We will probably see some new suppliers enter the business, and some old ones lose market share.
It sure makes for an exciting industry--both now as we try to forecast which way the industry will go, and in the future as companies develop solutions they think will be meet new customer requirements.
Two main alternatives now being considered by the leading-edge logic makers: vertical devices (FinFETs), and fully depleted planar transistors based on extremely thin SOI (FD-ETSOI) substrates. Further out, researchers are moving from silicon channels to germanium and III-V materials in heterogeneous ICs. Vertical transistors offer the potential for high performance, while presenting several manufacturing challenges. The transistors based on thin SOI substrates also have advantages and challenges. Can wafers with these thin layers be provided with consistent material thicknesses, at acceptable wafer costs?
Industry researchers are also discussing alternatives to today’s charge-based memories, including resistive RAMs (RRAMs), spin-torque transfer RAMs (STT-RAMs), and phase-change memories (PC-RAMs). Memory companies are confident they can advance NAND flash chips by putting memory cells on top of each other. These cell array transistor (CAT) memories could link 16-32 memory cells, taking NAND well beyond the 20 nm generation.
Nobu Koshiba, President, JSR Corporation, said during the keynote of the Strategic Materials Conference, “We are leaving the Materials Era and entering the Architecture Era…the evolution of CMOS devices will be driven by new architectures.”
Characterizing the new era will be diversified pathways to extend scaling, including 3D IC, extended CMOS through FinFET and other innovative structures, beyond-CMOS technologies such as nanotubes, graphene and other non-silicon possibilities, and new application or “fusion devices.” The pathway for logic may include FinFET structures with gate last integration. Challenges to overcome include metal fill through small structure, strained gate, and high temperature resistant dielectric fills that will require new deposition and material approaches.
In addition to 3D, DRAM and NAND pathways may include MRAM and ReRAM that will require new conduction path formation, resistivity change approaches, and the discovery of resistive film materials which enable high performance memory with simple planer stacking and/or cross point structure. New device structures may require magnetic materials with high thermal stability, low temperature (< 250°C) cure dielectrics, and low temperature (< 250°C) deposition of metal through PVD, electro plating, and/or electroless.
At ISS, Paulo Gargini discussed recent research that demonstrated how Ge can achieve high mobility and high drive current, and how Ge -well field effect transistor would be viable p channel option for low power III V CMOS architecture. Carbon nanotubes, graphene ribbons and other graphene approaches are also getting attention at Intel.
I am not a PhD so I can’t fully appreciate all the issues involved in vertical transistors, III V materials or new memory technologies. I think I do appreciate, however, the implications for the supply chain. Traditional scaling has impacted equipment, subsystems and components on a narrow range of parameters. While it drove an equipment and systems upgrade business coincident with Moore’s Law, many of the changes centered around lithography and structure dimensions. These new architecture changes will affect materials, temperatures and process characteristics in every way possible. The R&D challenges are going to be enormous and the collaboration requirements in the industry are going to skyrocket. Big research breakthroughs are going to trickle down to new equipment specifications, new instrumentation, even new vacuum pumps, and more. We will probably see some new suppliers enter the business, and some old ones lose market share.
It sure makes for an exciting industry--both now as we try to forecast which way the industry will go, and in the future as companies develop solutions they think will be meet new customer requirements.
Thursday, December 09, 2010
Thursday, October 14, 2010
LED Market Entering a Lull?
So, is the red hot LED market about to cool off?
According to DigiTimes, LED chipmakers including Epistar, Formosa Epitaxy and Tekcore expect revenues in September to continue to drop amid dropping demand for TV backlighting, and gross margins for the third quarter of 2010 are expected to drop 4-5 percentage points due to increases in component prices, as well as shortages of such components as sapphire substrates and special gases.
In August, IMS Research estimated that over 300 MOCVD systems were installed in Q2'10 to serve the rapidly growing high brightness (HB) LED market. This segment is benefitting from rapid gains in penetration into the notebook PC, LCD monitor, LCD TV and general lighting markets as well as a healthy subsidy in China. IMS also estimated that LED capacity will need to rise by 352% from 2009 to 2014 to keep up with demand, driving tool shipments throughout the HB LED supply chain.
According to IMS Research SVP Ross Young, "MOCVD is the single hottest category in the semiconductor manufacturing space with shipments expected to rise by nearly 500% in 2010 and to keep growing through 2013. With TVs, monitors and general lighting still early in the adoption cycle and the Chinese government encouraging a healthy LED infrastructure with a generous $1.5M subsidy per tool, this segment should remain hot.
Deutsche Bank and JP Morgan also see the MOCVD market growing through 2011. Canaccord Genuity predicts tool orders to peak in 1H’11.
Part of the reason for the near-term optimism in LED and MOCVD growth was the projected healthy demand from LED TVs. According to DisplaySearch, LCD TV panel makers are targeting aggressive growth for LED panel shipments, with plans to reach 40 percent LED penetration in Q4’10, and to exceed 50 percent in Q2’11. They estimated that Q2’10 vendors have shipped 9.5 million, or 18.5 percent, of the LCD TV panels with LED backlights, which was 110 percent growth quarter-to-quarter.
So what’s with the disappointing LED sales from Taiwan? Accorording to DigiTimes, Epistar indicated that decling September revenues were due to weakening demand for TV backlighting and general lighting, but the company expects revenues to start picking up in October as capacity adjustments for different applications have been completed and production is getting back on track.
Tekcore also believes that its September revenues will drop, while market observers expect the company's revenues to drop by 10-20% sequentially to about NT$200-220 million in September and revenues for the third quarter to increase by 10-12% sequentially to NT$700 million. Furthermore, component supply in the fourth quarter is expected to improve, helping to boost shipments.
Formosa Epitaxy expects its September revenues to drop 10% mainly due to low TV backlighting demand and tight component supply. Although TV backlighting demand may increase due to vendors' launch of new models in the fourth quarter, the small- to medium-size segment will enter the low season.
As the LED market scales to meet higher demand, predicting the point where overcapacity will cause a decline in capital spending and MOCVD tool orders will become an important planning issue for the industry. With over 80 manufacturers of epi wafers, serving increasingly diverse and dynamic markets, capital spending and pricing trends could be volatile for the next few years.
According to DigiTimes, LED chipmakers including Epistar, Formosa Epitaxy and Tekcore expect revenues in September to continue to drop amid dropping demand for TV backlighting, and gross margins for the third quarter of 2010 are expected to drop 4-5 percentage points due to increases in component prices, as well as shortages of such components as sapphire substrates and special gases.
In August, IMS Research estimated that over 300 MOCVD systems were installed in Q2'10 to serve the rapidly growing high brightness (HB) LED market. This segment is benefitting from rapid gains in penetration into the notebook PC, LCD monitor, LCD TV and general lighting markets as well as a healthy subsidy in China. IMS also estimated that LED capacity will need to rise by 352% from 2009 to 2014 to keep up with demand, driving tool shipments throughout the HB LED supply chain.
According to IMS Research SVP Ross Young, "MOCVD is the single hottest category in the semiconductor manufacturing space with shipments expected to rise by nearly 500% in 2010 and to keep growing through 2013. With TVs, monitors and general lighting still early in the adoption cycle and the Chinese government encouraging a healthy LED infrastructure with a generous $1.5M subsidy per tool, this segment should remain hot.
Deutsche Bank and JP Morgan also see the MOCVD market growing through 2011. Canaccord Genuity predicts tool orders to peak in 1H’11.
Part of the reason for the near-term optimism in LED and MOCVD growth was the projected healthy demand from LED TVs. According to DisplaySearch, LCD TV panel makers are targeting aggressive growth for LED panel shipments, with plans to reach 40 percent LED penetration in Q4’10, and to exceed 50 percent in Q2’11. They estimated that Q2’10 vendors have shipped 9.5 million, or 18.5 percent, of the LCD TV panels with LED backlights, which was 110 percent growth quarter-to-quarter.
So what’s with the disappointing LED sales from Taiwan? Accorording to DigiTimes, Epistar indicated that decling September revenues were due to weakening demand for TV backlighting and general lighting, but the company expects revenues to start picking up in October as capacity adjustments for different applications have been completed and production is getting back on track.
Tekcore also believes that its September revenues will drop, while market observers expect the company's revenues to drop by 10-20% sequentially to about NT$200-220 million in September and revenues for the third quarter to increase by 10-12% sequentially to NT$700 million. Furthermore, component supply in the fourth quarter is expected to improve, helping to boost shipments.
Formosa Epitaxy expects its September revenues to drop 10% mainly due to low TV backlighting demand and tight component supply. Although TV backlighting demand may increase due to vendors' launch of new models in the fourth quarter, the small- to medium-size segment will enter the low season.
As the LED market scales to meet higher demand, predicting the point where overcapacity will cause a decline in capital spending and MOCVD tool orders will become an important planning issue for the industry. With over 80 manufacturers of epi wafers, serving increasingly diverse and dynamic markets, capital spending and pricing trends could be volatile for the next few years.
Thursday, September 30, 2010
PV Manufacturing in the US and Europe
To fully leverage the economic and environmental benefits of the emerging CleanTech industry, the US and Europe need an aggressive and comprehensive approach to sustain and grow solar photovoltaic manufacturing. Wall Street may prefer the economic efficiency of manufacturing PV products in China with coal-powered electricity for deployment in Germany and California, but a more functional global market for PV would keep manufacturing next to end markets. It’s not the same as ICs; there are good reasons to take aggressive steps to incent manufacturing investments in Europe and the US.
With over 75% of the world’s installed solar PV energy capacity, Europe is the global center of the high-growth solar industry projected to contribute as much 14% of the world’s energy supply by 2030. The US is closing quickly and expected to surpass Germany in PV demand in the next 3 years. But China is now making over 50% of the solar PV cells and modules, creating a dangerous imbalance between supply and demand. It’s dangerous, in my opinion, because it’s not politically sustainable and will contrain technical advancement.
The SEMU PV Group has been advocating for meaningful and effective public policies that support the growth of the global solar industry since its inception. In Asia, we have
been focused on advocating demand-side policies to encourage the development of local markets for solar products, primarily in China, Taiwan and India. In 2008, we produced a White Paper entitled, “China’s Solar Future,” a report containing specific recommendations for the accelerated adoption of PV generated electric power. The report stated, “It is important that China occupy a leading position in the demand for solar power, as well as contribute to global supply.” The PV Group made similar appeals in Taiwan and India, also supported by well-documented White Papers. In the US and Europe, however, supply side policies are needed to increase local production of PV products.
Unlike fabless semiconductor development or outsourced discrete electronics manufacturing, PV products are dependent on the continuous improvement of manufacturing process technology and require the close coupling of R&D and manufacturing. New technologies, material sets and recipes identified in the lab, must be developed and validated on high-volume production environments. Long term market success is increasingly defined by the ability to go “from lab to fab.” These requirements compel a strong link between R&D with manufacturing. Loss of the manufacturing base due to poor financial incentives, lack of financing and other policies that discourage plant locations and upgrades in Europe will create powerful incentives for R&D and other key contributors to the value chain to migrate to Asia. That may be good for Asia, but bad for the Europe and US, and bad for fossil fuel reduction.
For Europe and United States, policymakers need to develop programs that seek a balance PV demand with PV supply--and that means policies that retain and grow the local manufacturing base. Building solar cells and modules in one region and shipping them around the world for deployment in another is not an optimal greenhouse gas strategy. Unlike computer chips, there is a meaningful cost advantage to manufacturing solar PV close to where it will be deployed. It makes good economic and environmental sense to leverage this cost advantage through sound public policies that support local manufacturing.
Trade restrictions and reprisals against Asian manufacturers are not the answer and will ultimately harm all manufacturers and global environmental goals. Libertarian rhetoric and calls for “lower taxes and less regulation” aren’t realistic or substantive. The solution lies in recognizing the unique needs and important economic benefits of manufacturing and crafting sound policies that retain and grow manufacturing in the US and Europe.
Photo caption: SolarWorld 500MW Cell and Module fab in Hillsboro, OR
With over 75% of the world’s installed solar PV energy capacity, Europe is the global center of the high-growth solar industry projected to contribute as much 14% of the world’s energy supply by 2030. The US is closing quickly and expected to surpass Germany in PV demand in the next 3 years. But China is now making over 50% of the solar PV cells and modules, creating a dangerous imbalance between supply and demand. It’s dangerous, in my opinion, because it’s not politically sustainable and will contrain technical advancement.
The SEMU PV Group has been advocating for meaningful and effective public policies that support the growth of the global solar industry since its inception. In Asia, we have
been focused on advocating demand-side policies to encourage the development of local markets for solar products, primarily in China, Taiwan and India. In 2008, we produced a White Paper entitled, “China’s Solar Future,” a report containing specific recommendations for the accelerated adoption of PV generated electric power. The report stated, “It is important that China occupy a leading position in the demand for solar power, as well as contribute to global supply.” The PV Group made similar appeals in Taiwan and India, also supported by well-documented White Papers. In the US and Europe, however, supply side policies are needed to increase local production of PV products.Unlike fabless semiconductor development or outsourced discrete electronics manufacturing, PV products are dependent on the continuous improvement of manufacturing process technology and require the close coupling of R&D and manufacturing. New technologies, material sets and recipes identified in the lab, must be developed and validated on high-volume production environments. Long term market success is increasingly defined by the ability to go “from lab to fab.” These requirements compel a strong link between R&D with manufacturing. Loss of the manufacturing base due to poor financial incentives, lack of financing and other policies that discourage plant locations and upgrades in Europe will create powerful incentives for R&D and other key contributors to the value chain to migrate to Asia. That may be good for Asia, but bad for the Europe and US, and bad for fossil fuel reduction.
For Europe and United States, policymakers need to develop programs that seek a balance PV demand with PV supply--and that means policies that retain and grow the local manufacturing base. Building solar cells and modules in one region and shipping them around the world for deployment in another is not an optimal greenhouse gas strategy. Unlike computer chips, there is a meaningful cost advantage to manufacturing solar PV close to where it will be deployed. It makes good economic and environmental sense to leverage this cost advantage through sound public policies that support local manufacturing.
Trade restrictions and reprisals against Asian manufacturers are not the answer and will ultimately harm all manufacturers and global environmental goals. Libertarian rhetoric and calls for “lower taxes and less regulation” aren’t realistic or substantive. The solution lies in recognizing the unique needs and important economic benefits of manufacturing and crafting sound policies that retain and grow manufacturing in the US and Europe.
Photo caption: SolarWorld 500MW Cell and Module fab in Hillsboro, OR
Monday, August 30, 2010
This Rebound is Different
As the semiconductor capital equipment and materials market enjoys nearly unprecedented year-over-year growth, many industry analysts see signs of caution on the horizon. The most recent SEMI Book-to-Bill ratio reached 1.23 (meaning that $123 worth of orders was received for every $100 of product billed for the month) and the three-month average of worldwide bookings jumped 220.4 percent above 2009, but a packed audience of industry leaders heard mixed signals related to 2011-2012 growth at the recent Silicon Valley Lunch Forum.
Bob Johnson of Gartner sees capital spending up over 90% in 2010 and continuing to inc
rease in 2011. He sees, “strength through 2012, then retrenchment.” After reaching $35.4 billion in 2010, Gartner’s current cap spending forecast reaches $37.7 billion in 2011 (6.6% growth) and $40.8 billion in 2012 (8.2% growth). Gartner’s current capex estimate for the 2013 “retrenchment” is $34.9 billion, a decline of 14.6% from 2012 estimates.
Gartner’s current data indicates market strength: IC unit volumes and equipment are surging, driven by strong end user markets, especially PCs and mobile phones. Johnson does acknowledge, however, uncertainty caused by recent company announcements. While global economic recovery is strong, US economic growth is apparently softening and uncertain. He also sees volume declines at the packaging, assembly and test houses, and some indication of inventory increases in the supply chain.
Bill McClean of IC Insights is quick to point out that the current weak US economic recovery is not representative of the overall global market environment. Modest GDP growth in
the US, Europe and Japan projected for 2010 should not obscure the robust 7.3% growth elsewhere in the world. China’s GDP is projected to grow 10.6% and India 8.5%, and much of this rising prosperity is driving strong global IC demand.
But McClean does acknowledge, “This rebound is different.” Unlike any other year since 1983, after two down years in capital spending, this year’s capital spending surge will be in the first year of recovery, not the second. Capital spending will increase by a reasonably robust 9% in 2011, but far less than the 93% he projects for 2010. Every year in the modern history of semiconductors the largest increase in capital spending has occurred in year two of the recovery. Does this cap spending trend signal a more modest cyclical decline in 2013, or is the industry entering an era with new spending patterns? Typically capital spending will decline after a 50% increase in capex, but this year’s IC wafer capacity will only increase an estimated 1.6% after an unprecedented 7.6% decline last year (capacity has only declined one year in history). And, 300mm IC fab utilization will reach 98.4%, suggesting the market can easily accommodate the recent increase in capital spending.
Both analysts agree that future cycles will be primarily driven by memory manufacturers. Johnson estimates 41% of 2010 capex will come from memory fabs, versus 21% from foundries/OSATs and 17% from other IDMs. McClean ranks six of the top ten capital spenders in the memory segment, representing 55% of the total spending from these top companies. Memory firms have been most susceptible to the market forces that accelerate super-cyclical swings in capital spending. In addition to the traditional cycles influenced heavily by rising then falling ASPs and fab utilization rates, Johnson suggests that capital spending by memory makers will also not have sufficient net cash flow to fund future capex needs.
The cyclicality—or super-cyclicality—of spending patterns is one of the many challenging and unique attributes of the semiconductor industry. In one of the most demanding R&D industries in the world, the IC supply chain has had to endure radical swings in capital spending while keeping pace with relentless Moore’s Law and stockholder expectations. The rapid rebound from last year’s alarming drop in equipment spending (down to less than $17 billion from a 2007 high of over $44 billion) is a testament to the ingenuity, flexibility and resourcefulness of SEMI members. Whether this PhD-intensive industry can sustain another swift drop in spending remains to be seen, but for the next few quarters, a positive market environment looks certain. Beyond that, well, only time will tell.
Bob Johnson of Gartner sees capital spending up over 90% in 2010 and continuing to inc
rease in 2011. He sees, “strength through 2012, then retrenchment.” After reaching $35.4 billion in 2010, Gartner’s current cap spending forecast reaches $37.7 billion in 2011 (6.6% growth) and $40.8 billion in 2012 (8.2% growth). Gartner’s current capex estimate for the 2013 “retrenchment” is $34.9 billion, a decline of 14.6% from 2012 estimates.Gartner’s current data indicates market strength: IC unit volumes and equipment are surging, driven by strong end user markets, especially PCs and mobile phones. Johnson does acknowledge, however, uncertainty caused by recent company announcements. While global economic recovery is strong, US economic growth is apparently softening and uncertain. He also sees volume declines at the packaging, assembly and test houses, and some indication of inventory increases in the supply chain.
Bill McClean of IC Insights is quick to point out that the current weak US economic recovery is not representative of the overall global market environment. Modest GDP growth in
the US, Europe and Japan projected for 2010 should not obscure the robust 7.3% growth elsewhere in the world. China’s GDP is projected to grow 10.6% and India 8.5%, and much of this rising prosperity is driving strong global IC demand.But McClean does acknowledge, “This rebound is different.” Unlike any other year since 1983, after two down years in capital spending, this year’s capital spending surge will be in the first year of recovery, not the second. Capital spending will increase by a reasonably robust 9% in 2011, but far less than the 93% he projects for 2010. Every year in the modern history of semiconductors the largest increase in capital spending has occurred in year two of the recovery. Does this cap spending trend signal a more modest cyclical decline in 2013, or is the industry entering an era with new spending patterns? Typically capital spending will decline after a 50% increase in capex, but this year’s IC wafer capacity will only increase an estimated 1.6% after an unprecedented 7.6% decline last year (capacity has only declined one year in history). And, 300mm IC fab utilization will reach 98.4%, suggesting the market can easily accommodate the recent increase in capital spending.
Both analysts agree that future cycles will be primarily driven by memory manufacturers. Johnson estimates 41% of 2010 capex will come from memory fabs, versus 21% from foundries/OSATs and 17% from other IDMs. McClean ranks six of the top ten capital spenders in the memory segment, representing 55% of the total spending from these top companies. Memory firms have been most susceptible to the market forces that accelerate super-cyclical swings in capital spending. In addition to the traditional cycles influenced heavily by rising then falling ASPs and fab utilization rates, Johnson suggests that capital spending by memory makers will also not have sufficient net cash flow to fund future capex needs.
The cyclicality—or super-cyclicality—of spending patterns is one of the many challenging and unique attributes of the semiconductor industry. In one of the most demanding R&D industries in the world, the IC supply chain has had to endure radical swings in capital spending while keeping pace with relentless Moore’s Law and stockholder expectations. The rapid rebound from last year’s alarming drop in equipment spending (down to less than $17 billion from a 2007 high of over $44 billion) is a testament to the ingenuity, flexibility and resourcefulness of SEMI members. Whether this PhD-intensive industry can sustain another swift drop in spending remains to be seen, but for the next few quarters, a positive market environment looks certain. Beyond that, well, only time will tell.
Thursday, August 12, 2010
Manufacturing and R&D Go Hand in Hand
If you’re making an electronic product with a motherboard than needs stuffing and a final assembly, it doesn’t matter much where you make the product from the company’s perspective. Manufacturing certainly matters when you are talking about national interest and public policy. Here, governments have a strong interest in where large employers put factories, but private interests are just concerned with economic optimization.
For companies, you’re looking for the lowest total cost at guaranteed quality levels and there are plenty of qualified companies around the world capable of performing the function. The long term competitive advantage for most companies is not in manufacturing, but in innovation, design, marketing and other points on the value chain. Manufacturing is a function that can be outsourced, like payroll accounting, communications, insurance and the like.
For most products, there is very little interaction between the factory and product development process so the value of manufacturing location is slight. The calculation is concerned exclusively with the Bill of Materials, assembly costs, shipping costs, quality metrics, and other pure economic considerations.
ICs and solar PV are different. It does matter. R&D and manufacturing are intimately linked and losing one will probably accelerate the loss of the other.
Mike Splinter made this point at the Aspen Ideas Festival when he explained that in our business, “manufacturing isn't just where ideas are put into practice, but a key part of the innovation ecosystem.”
In ICs, how fast you get to the next node, how fast you debug and tape out, how fast you ramp, and how fast to yield will determine your success. Each of these steps requires manufacturing expertise of the highest order. Sure, a lot of chips are made in foundries, but manufacturing remains an enormous chunk of the value chain. There’s not too many fabless companies doing better than TSMC or ASE.
And its not just scaling that is sustaining the value of manufacturing in semiconductors. Since 1975 scaling has delivered around 8000 times improvement in the cost of ICs as transistor feature sizes were reduced from 4 micron to 45 nanometers. Manufacturing efficiencies accounted for another 500 X in cost reduction over this period. Some experts have claimed that technology shrink delivers 30-50% of the yearly cost reduction in chips, productivity improvement brings 10-30%, yield 10-15% yearly (wafer size transition brings another 30-50% cost reduction every 10-15 years.
In this environment, manufacturing capability in inextricably linked to profitability and competitive advantage. You don’t do productivity, yield and cycle time well, you don’t survive. And, if you don’t have R&D deeply engaged in manufacturing, you won’t be competitive.
Same is true for solar. Thin and crystalline solar technologies are similar process technologies to chips. Manufacturing optimization is critical to sustaining long term competitive value. Just a glance at NREL’s tracking of best efficiencies in solar sees a long, steady continuous improvement process. While the NREL data points are from the lab, the process is replicated in the fab; the ability to commercialize incremental efficiency improvements through manufacturing is how, in large part, solar manufacturers’ compete. Having a fab onsite, where R&D engineers can prototype new recipes, troubleshoot new processes, and tweak yield and productivity improvements is an advantage and provides real value.
Large, multi-billion dollar fabs also bring a clustering of best-in-class suppliers to the neighborhood. Specialty gas producers, machine shops, labs, scientific specialties, process technology firms, etcetera, ecetera always spring up around fabs. They innovate too.
So, when Apple builds the iPad at a Foxconn plant in Shenzhen, or HP netbooks in Taipei, is the US at risk of further losing their share of the mobile computing market? Will those companies shift a large portion of their R&D and marketing teams to Asia? Probably not.
But when fabs go up in Asia, PV and IC R&D is probably not too far behind.
Mike Splinter is absolutely right when he says the micro and nano manufacturing is an essential part of the “innovation ecosystem.” The question is whether any of US’s national leaders that flock to the prestigious Aspen Festival really understood him. I know leaders in China, Korea, Taiwan and Japan do.
For companies, you’re looking for the lowest total cost at guaranteed quality levels and there are plenty of qualified companies around the world capable of performing the function. The long term competitive advantage for most companies is not in manufacturing, but in innovation, design, marketing and other points on the value chain. Manufacturing is a function that can be outsourced, like payroll accounting, communications, insurance and the like.
For most products, there is very little interaction between the factory and product development process so the value of manufacturing location is slight. The calculation is concerned exclusively with the Bill of Materials, assembly costs, shipping costs, quality metrics, and other pure economic considerations.
ICs and solar PV are different. It does matter. R&D and manufacturing are intimately linked and losing one will probably accelerate the loss of the other.
Mike Splinter made this point at the Aspen Ideas Festival when he explained that in our business, “manufacturing isn't just where ideas are put into practice, but a key part of the innovation ecosystem.”
In ICs, how fast you get to the next node, how fast you debug and tape out, how fast you ramp, and how fast to yield will determine your success. Each of these steps requires manufacturing expertise of the highest order. Sure, a lot of chips are made in foundries, but manufacturing remains an enormous chunk of the value chain. There’s not too many fabless companies doing better than TSMC or ASE.
And its not just scaling that is sustaining the value of manufacturing in semiconductors. Since 1975 scaling has delivered around 8000 times improvement in the cost of ICs as transistor feature sizes were reduced from 4 micron to 45 nanometers. Manufacturing efficiencies accounted for another 500 X in cost reduction over this period. Some experts have claimed that technology shrink delivers 30-50% of the yearly cost reduction in chips, productivity improvement brings 10-30%, yield 10-15% yearly (wafer size transition brings another 30-50% cost reduction every 10-15 years.
In this environment, manufacturing capability in inextricably linked to profitability and competitive advantage. You don’t do productivity, yield and cycle time well, you don’t survive. And, if you don’t have R&D deeply engaged in manufacturing, you won’t be competitive.
Same is true for solar. Thin and crystalline solar technologies are similar process technologies to chips. Manufacturing optimization is critical to sustaining long term competitive value. Just a glance at NREL’s tracking of best efficiencies in solar sees a long, steady continuous improvement process. While the NREL data points are from the lab, the process is replicated in the fab; the ability to commercialize incremental efficiency improvements through manufacturing is how, in large part, solar manufacturers’ compete. Having a fab onsite, where R&D engineers can prototype new recipes, troubleshoot new processes, and tweak yield and productivity improvements is an advantage and provides real value.
Large, multi-billion dollar fabs also bring a clustering of best-in-class suppliers to the neighborhood. Specialty gas producers, machine shops, labs, scientific specialties, process technology firms, etcetera, ecetera always spring up around fabs. They innovate too.
So, when Apple builds the iPad at a Foxconn plant in Shenzhen, or HP netbooks in Taipei, is the US at risk of further losing their share of the mobile computing market? Will those companies shift a large portion of their R&D and marketing teams to Asia? Probably not.
But when fabs go up in Asia, PV and IC R&D is probably not too far behind.
Mike Splinter is absolutely right when he says the micro and nano manufacturing is an essential part of the “innovation ecosystem.” The question is whether any of US’s national leaders that flock to the prestigious Aspen Festival really understood him. I know leaders in China, Korea, Taiwan and Japan do.
Wednesday, August 11, 2010
Monday, August 02, 2010
Thursday, July 29, 2010
It’s a Growth Industry…Again
I should be the last person who needs reminding that the semiconductor industry is a growth industry. But then again, I’m not only one who needs reminding.
The chart below from Bill McLean of IC Insights illustrates the underlying, long-term strength of our industry. To use his terminology, “demand never dies, it is only deferred.” From 99-04 (including the dot com crash) chip unit volume increased 9.5%, from 05-07 the market grew 14%, since 2008 a 10% trend line is appearing. Chip revenue growth is also firmly in the growth category. In the 90’s, it grew an average of 14%; from 2001-2007, it grew 9%. This year expectations are that revenue growth will be 28-30%. Industry analyst, Jim Cavello of Goldman Sachs said many times during SEMICON West, “chip growth may go up and down, but it averages 10%.” World GDP growth averages from 2-4%, chip have been more than double that, and will be for as long as we can see.
The chart below from Bill McLean of IC Insights illustrates the underlying, long-term strength of our industry. To use his terminology, “demand never dies, it is only deferred.” From 99-04 (including the dot com crash) chip unit volume increased 9.5%, from 05-07 the market grew 14%, since 2008 a 10% trend line is appearing. Chip revenue growth is also firmly in the growth category. In the 90’s, it grew an average of 14%; from 2001-2007, it grew 9%. This year expectations are that revenue growth will be 28-30%. Industry analyst, Jim Cavello of Goldman Sachs said many times during SEMICON West, “chip growth may go up and down, but it averages 10%.” World GDP growth averages from 2-4%, chip have been more than double that, and will be for as long as we can see.
Rick Hill, CEO of Novellus recently told EETimes, "The way we see the semiconductor industry today is a lot like it was back in the mid-90s," Hill said. "There were fundamental drivers driving the business upward, as opposed to the mid-2000s, where it was more of supply-driven expansion in the industry for semiconductors."
He said that the three main growth drivers in the 90’s were infrastructure, fear uncertainty and doubt (FUD), and the PC and similar forces are at work today. Key forces driving demand today, according to Hill are, Windows 7 and telecom infrastructure, cybersecurity (FUD) and shifting consumer demand (primarily China and India).
My opinion is that there are no longer any dominant growth drivers; there are many growth drivers. There are mobile phones, ipods and ipads, TVs, cameras everywhere, smart autos, smart homes, smart everything . It’s ubiquitous, pervasive demand for all things digital. It’s like food and water—growing with human progress—but a growth industry because chip content in nearly everything that touches our lives is increasing. Its not only about lifestyles, its about life itself as semiconductor technology is embedded in cleantech and climate change mitigation in things like solar panels, smart meters, solid state lighting, and electric cars. We need semiconductor technology not only to live well, but to live period.
Now, the reason we need reminding that we work within an exciting growth industry is because of the mega trends and forces that always seem like they are trying to overwhelm us. One of the trends is super-cyclicalality. It’s hard to enjoy the good times when we’re either recovering from the last slump or anticipating the next one. Another reason is the hyper competiveness of the industry. If you’re not essential—as a person, as a product or company—you’re gonna get optimized out. There’s no room for softness or second best. The industry has been bred to seek and destroy inefficiencies, whether they are costs, process steps or people. We’re a paranoid industry, said Andy Grove, always fearful of the slump, the next cut, the next innovation, or the next big thing.
We may be a growth industry, but sometimes we sure don’t feel like it.
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